The big hurdle was in overcoming the limited size of a graphene sheet. Whereas today's silicon wafers come in 8" or 12" (200 mm or 300 mm) circles, the largest graphene sheet that could be created in the lab was only a couple millimeters square, too small for today's several hundred square millimeter CPUs. So, what the researchers did was essentially create a patchwork of tiny graphene sections, only 1/10th mm square. These small patches are overlaid on a traditional silicon substrate wherever logic circuits are required. The end result is like having a football field covered with 1" square pieces of paper. The entire football field is covered with paper, and yet no individual piece is very big.
To create the final substrate, the graphene source material could be thought of like sheets of cookie dough. A type of stamp comes down and presses against the graphene. When the stamp is extracted, the graphene sticks to the stamp. It is then moved onto the final position on the destination substrate, whereby it is pressed onto it. The act of pressing transfers the graphene from the stamp to the substrate, where it adheres and resides through the stamping force.
Earlier efforts involved using a type of "Scotch Tape" to randomly pick up sheets of graphene for deposition. This resulted in a haphazard layout, resembling the images shown in this document. There are no images of the new process, but it could be easily envisioned as a series of squares covering larger surface areas.
While it seems like a lot of work, the payoff potential is in processing speed. One measurement of the potential advantages of carbon over silicon comes from something called an "electronic hole" measurement. In such tests, the carbon circuits performed 10x faster than silicon. According to the researchers, there would be an almost immediate benefit in radio technology, such as cell phones and wireless devices with high power outputs. Devices could be smaller, use less power, and produce greater signals due to the properties of carbon-based transistors.
One of the researchers believes the carbon technology could be adapted in a few years. The current 1/10th mm size is the first step in the proof of concept implementation. Now that the team has proved it can be done, the next step is to scale it up for larger applications. Eventually, entire CPUs could be created that would be 10x on the same amount of power as is seen today.
The work was carried out by professor of electrical engineering, Stephen Chou, and graduate student Xiaogan Liang at Princeton University. No word was given on the source of funding, however Princeton University receives funding from DARPA, the U.S. Department of Energy, and other U.S. government sources.